Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics
eFUSE Programming Conditions
Table 70 lists the programming conditions specifically for eFUSE. For more information, see the 7 Series FPGA
Configuration User Guide ( UG470 ).
Table 70: eFUSE Programming Conditions (1)
I FS
t j
Symbol
V CCAUX supply current
Temperature range
Description
Min
15
Typ
Max
115
125
Units
mA
°C
Notes:
1.
The FPGA must not be configured during eFUSE programming.
Revision History
The following table shows the revision history for this document:
Date
03/01/2011
04/01/2011
10/04/2011
11/03/2011
02/13/2012
Version
1.0
1.1
1.2
1.3
1.4
Description
Initial Xilinx release.
Added the XC7K355T, XC7K420T, and XC7K480T devices throughout data sheet. Added the
extended temperature range discussion to page 1 . Updated V CCAUX_IO in Table 2 . Edits to clarify
Power-On/Off Power Supply Sequencing power sequencing discussion. Added I CCAUX_IO and I CCBRAM
to Table 6 and Table 7 . Updated MMCM_F INDUTY and added F INJITTER , T OUTJITTER , T EXTFDVAR , and
Note 3 to Table 39 . Removed the SBG324 package from Table 51 . Updated the Notice of Disclaimer .
Replaced -1L with -2L throughout this data sheet. Updated Min/Max values and removed Note 5 from
Table 2 . Clarified Power-On/Off Power Supply Sequencing power sequencing discussion including
adding T VCCO2VCCAUX to Table 8 . Updated V ICM in Table 12 and Table 13 . Added Note 1 to table 12.
Updated Table 70 including adding Note 1 . Added Absolute Maximum Ratings for GTX Transceivers .
Revised the reference clock maximum frequency (F GCLK ) in Table 56 . Added Table 58 . Added LVTTL
and removed SSTL135_II and SSTL15_II specifications from Table 20 . Removed HSTL_III from
Table 21 . Removed the I/O Standard Adjustment Measurement Methodology section. Use IBIS for
more accurate information and measurements. Updated T IDELAYPAT_JIT in Table 27 . Added T AS /T AH to
Table 29 . Added T RDCK_DI_WF_NC /T RCKD_DI_WF_NC and T RDCK_DI_RF /T RCKD_DI_RF to Table 32 .
Completely updated Table 69 . Updated the AC Switching Characteristics in Table 20 , Table 21 ,
Table 22 , Table 23 , Table 24 , Table 25 , Table 27 through Table 39 , Table 41 though Table 38 , and Table
67.
Revised the V OCM specification in Table 12 . Updated the AC Switching Characteristics based upon the
ISE 13.3 v1.02 speed specification throughout document including Table 20 and Table 21 . Added
MMCM_T FBDELAY while adding MMCM_ to the symbol names of a few specifications in Table 39 and
PLL to the symbol names in Table 40 . In Table 41 through Table 48 , updated the pin-to-pin descriptions
with the SSTL15 standard. Updated units in Table 50 .
Updated summary description on page 1 . In Table 2 , revised V CCO for the 3.3V HR I/O banks and
updated T j . Added typical values to Table 3 . Updated the notes in Table 6 . Added MGTAVCC,
MGTAVTT, and MGTVCCAUX power supply ramp times to Table 8 . Rearranged Table 9 , added
Mobile_DDR, HSTL_I_18, HSTL_II_18, HSUL_12, SSTL135_R, SSTL15_R, and SSTL12 and
removed DIFF_SSTL135, DIFF_SSTL18_I, DIFF_SSTL18_II, DIFF_HSTL_I, and DIFF_HSTL_II.
Added Table 10 and Table 11 . Revised the specifications in Table 12 and Table 13 . Updated the
eFUSE Programming Conditions section and removed the endurance table. Added the IO_FIFO
Switching Characteristics table. Revised I CCADC and updated Note 1 in Table 68 . Revised DDR LVDS
transmitter data width in Table 17 . Updated the AC Switching Characteristics based upon the ISE 13.4
v1.03 speed specification throughout document. Removed notes from Table 29 as they are no longer
applicable. Updated specifications in Table 69 . Updated Note 1 in Table 38 .
In the GTX Transceiver DC Input and Output Levels section: Revised V IN , and added I DCIN and I DCOUT
to Table 52 . Added Note 4 to Table 54 . In Table 56 , revised F GCLK , removed T PHASE , and added
T DLOCK . Revised specifications and added Note 2 to Table 58 . Added Table 59 and Table 60 along with
DS182 (v2.8) March 4, 2014
Product Specification
60
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